Electrical effects of corner Serif OPC

Today's Optical Proximity Correction (OPC) is becoming increasingly complex and necessitates that we use smaller and smaller grid sizes to produce the fine patterns required. These small grids lead to significant overhead in data handling and, more importantly, for the tools that will write and inspect the mask, together making the mask extremely expensive. For two dimensional structures, such as corners, we have very complex structures using either additive or subtractive OPC features to produce the desired shape. However, it is unclear whether these structures need to be so perfect for the electrical task they are intended to perform. In previous work we have created a number of corner type electrical test structures and applied varying degrees of OPC to both the outer and inner corners of the structures, then printed these on doped polysilicon and the electrical effect of the OPC was investigated. This work showed that the electrical effect of OPC on the outer corner was minimal, whereas the inner corner shape had a marked influence upon the electrical resistance of the circuit feature. However, technology continues to move forward and polysilicon gates are being replaced by metal gates for 32nm node. Therefore, in this work we replace the polysilicon with a metal and investigate the size and position of OPC applied to both the outer and inner corners of the structures. The data obtained using the metal structures suggests that as was the case when using polysilicon, OPC on the outside corner has little impact upon a simple circuit's performance, while care should be taken with OPC on the inner corners, particularly with regard to the size of the OPC serifs used.