TY - CHAP
T1 - Investigation of electrical and optical CD measurement techniques for the characterisation of on-mask GHOST proximity corrected features
AU - Tsiamis, A.
AU - Smith, S.
AU - Stevenson, J.T.M.
AU - Walton, A.J.
AU - McCallum, M.
AU - Hourd, A.C.
AU - Toublan, O.
PY - 2008/5/2
Y1 - 2008/5/2
N2 - This paper reports the measurement results from a set of electrical, on-mask test structures based on industry standard test feature layouts normally used to investigate process proximity effects and improve optical proximity correction (OPC) models. The electrical test structures were fabricated on a binary photomask using the GHOST proximity correction technique to compensate for typical e-beam induced proximity errors. This is one of the first times that electrical test structures have been used to evaluate GHOST exposure. The test structures were measured electrically and optically with a dedicated photomask metrology tool and the results from the two techniques are presented.
AB - This paper reports the measurement results from a set of electrical, on-mask test structures based on industry standard test feature layouts normally used to investigate process proximity effects and improve optical proximity correction (OPC) models. The electrical test structures were fabricated on a binary photomask using the GHOST proximity correction technique to compensate for typical e-beam induced proximity errors. This is one of the first times that electrical test structures have been used to evaluate GHOST exposure. The test structures were measured electrically and optically with a dedicated photomask metrology tool and the results from the two techniques are presented.
UR - http://www.scopus.com/inward/record.url?scp=51349135137&partnerID=8YFLogxK
U2 - 10.1109/ICMTS.2008.4509310
DO - 10.1109/ICMTS.2008.4509310
M3 - Other chapter contribution
AN - SCOPUS:51349135137
SN - 9781424418008
SP - 29
EP - 34
BT - IEEE International Conference on Microelectronic Test Structures
PB - IEEE Computer Society
ER -