SpaceWire and SpaceFibre on the Microsemi RTG4 FPGA

Stephen (Steve) Parkes (Lead / Corresponding author), Chris McClements, David McLaren, Bassam Youssef, Mir Sayed Ali, Albert Ferrer Florit, Alberto Gonzalez Villafranca

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Citations (Scopus)


SpaceWire is a spacecraft on-board data-handling network which connects instruments to the mass-memory, data processors and control processors, which is already in orbit or being designed into more than 100 spacecraft. SpaceFibre is a new, multi-Gbits/s, on-board network technology, which runs over both electrical and fibre-optic cables. SpaceFibre is capable of fulfilling a wide range of spacecraft on-board communications applications because of its inbuilt quality of service (QoS) and fault detection, isolation and recovery (FDIR) capabilities. The Microsemi RTG4 is a new generation radiation tolerant FPGA. It has extensive logic, memory, DSP blocks, and IO capabilities and is inherently radiation tolerant, having triple mode redundancy built in. The RTG4 has a flash configuration memory built into the device. In addition the FPGA incorporates 16 SpaceWire clock-data recovery circuits and 24 multi-Gbits/s SerDes lanes to support high-speed serial protocols like SpaceFibre. STAR-Dundee has implemented SpaceWire and SpaceFibre IP cores using the Microsemi RTG4 Development Kit. The flight proven SpaceWire IP core was initially run at over 200 Mbits/s and the SpaceFibre IP core at 2.5 Gbits/s. With a little more work it is expected to reach 300 Mbits/s and 3.125 Mbits/s respectively. The SpaceWire IP core takes around 1% of the FPGA and the SpaceFibre IP core around 3-5% depending on the number of virtual channels supported. The use of the RTG4 with the SpaceWire and SpaceFibre IP cores provides a powerful platform for future spacecraft on-board instrument control, data-handling, and data processing. Furthermore the advanced QoS and FDIR capabilities of SpaceFibre make it suitable for a wider range of spacecraft onboard applications including integrated payload data-handling and attitude and orbit control networks and launcher applications where deterministic data delivery is required. This paper reports on the implementation and testing of the SpaceWire and SpaceFibre IP cores in the Microsemi RTG4 FPGA.

Original languageEnglish
Title of host publication2016 IEEE Aerospace Conference, AERO 2016
Number of pages8
ISBN (Electronic)9781467376761
Publication statusPublished - 27 Jun 2016
Event2016 IEEE Aerospace Conference, AERO 2016 - Big Sky, United States
Duration: 5 Mar 201612 Mar 2016


Conference2016 IEEE Aerospace Conference, AERO 2016
Country/TerritoryUnited States
CityBig Sky


  • FDIR
  • FPGA
  • Network
  • Next Generation Interconnect
  • Quality of Service
  • Radiation Tolerant
  • RTG4
  • Spacecraft On-board Data-Handling
  • SpaceFibre
  • SpaceWire

ASJC Scopus subject areas

  • Aerospace Engineering
  • Space and Planetary Science


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